52 research outputs found

    A 64mW DNN-based Visual Navigation Engine for Autonomous Nano-Drones

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    Fully-autonomous miniaturized robots (e.g., drones), with artificial intelligence (AI) based visual navigation capabilities are extremely challenging drivers of Internet-of-Things edge intelligence capabilities. Visual navigation based on AI approaches, such as deep neural networks (DNNs) are becoming pervasive for standard-size drones, but are considered out of reach for nanodrones with size of a few cm2{}^\mathrm{2}. In this work, we present the first (to the best of our knowledge) demonstration of a navigation engine for autonomous nano-drones capable of closed-loop end-to-end DNN-based visual navigation. To achieve this goal we developed a complete methodology for parallel execution of complex DNNs directly on-bard of resource-constrained milliwatt-scale nodes. Our system is based on GAP8, a novel parallel ultra-low-power computing platform, and a 27 g commercial, open-source CrazyFlie 2.0 nano-quadrotor. As part of our general methodology we discuss the software mapping techniques that enable the state-of-the-art deep convolutional neural network presented in [1] to be fully executed on-board within a strict 6 fps real-time constraint with no compromise in terms of flight results, while all processing is done with only 64 mW on average. Our navigation engine is flexible and can be used to span a wide performance range: at its peak performance corner it achieves 18 fps while still consuming on average just 3.5% of the power envelope of the deployed nano-aircraft.Comment: 15 pages, 13 figures, 5 tables, 2 listings, accepted for publication in the IEEE Internet of Things Journal (IEEE IOTJ

    Scalable Hierarchical Instruction Cache for Ultra-Low-Power Processors Clusters

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    High Performance and Energy Efficiency are critical requirements for Internet of Things (IoT) end-nodes. Exploiting tightly-coupled clusters of programmable processors (CMPs) has recently emerged as a suitable solution to address this challenge. One of the main bottlenecks limiting the performance and energy efficiency of these systems is the instruction cache architecture due to its criticality in terms of timing (i.e., maximum operating frequency), bandwidth, and power. We propose a hierarchical instruction cache tailored to ultra-low-power tightly-coupled processor clusters where a relatively large cache (L1.5) is shared by L1 private caches through a two-cycle latency interconnect. To address the performance loss caused by the L1 capacity misses, we introduce a next-line prefetcher with cache probe filtering (CPF) from L1 to L1.5. We optimize the core instruction fetch (IF) stage by removing the critical core-to-L1 combinational path. We present a detailed comparison of instruction cache architectures' performance and energy efficiency for parallel ultra-low-power (ULP) clusters. Focusing on the implementation, our two-level instruction cache provides better scalability than existing shared caches, delivering up to 20\% higher operating frequency. On average, the proposed two-level cache improves maximum performance by up to 17\% compared to the state-of-the-art while delivering similar energy efficiency for most relevant applications.Comment: 14 page

    Effect of electric field on laser induced damage threshold of multilayer dielectric gratings

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    International audienceThis paper studies gratings engraved in multilayer dielectric stacks for ultra high intensity laser compressors application. We design various grating profiles with high reflected efficiencies for 1780 l/mm multilayer dielectric gratings (MLD). Each grating is defined to exhibit a different electric field maximum value in the pillars of the grating. A damage testing facility operating at 1.053 ÎĽm, 500 fs pulse duration is used to damage test the parts manufactured from these designs. It is evidenced that for fixed incident angle and materials the damage of the grating is directly related to the electric field intensity maximum in the material, which depends on the groove profile. Laser induced damage thresholds of 5 J/ cm2 are experimentally reached with very high and uniform efficiencies

    PENGARUH NEGARA ASAL, CITRA MEREK DAN KEPERCAYAAN MEREK TERHADAP PERSEPSI DARI KUALITAS PRODUK ETUDE HOUSE KOREA SELATAN

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    The aim of this research is to know the influence of country of origin, brand image and brand trust on perception of Etude House of South Korea Product Quality. Total sample used is 100 respondents as user of Etude House. The techique of analysis used is Structural Equation Modeling (SEM) with AMOS 18. The result shown that country of origin has an effect on perception of product quality, brand image has an effect on perception of product quality and brand trust can positively mediate country of origin and the perception of product quality

    The transprecision computing paradigm: Concept, design, and applications

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    Guaranteed numerical precision of each elementary step in a complex computation has been the mainstay of traditional computing systems for many years. This era, fueled by Moore’s law and the constant exponential improvement in computing efficiency, is at its twilight: from tiny nodes of the Internet-of-Things, to large HPC computing centers, subpicoJoule/operation energy efficiency is essential for practical realizations. To overcome the power wall, a shift from traditional computing paradigms is now mandatory. In this paper we present the driving motivations, roadmap, and expected impact of the European project OPRECOMP. OPRECOMP aims to (i) develop the first complete transprecision computing framework, (ii) apply it to a wide range of hardware platforms, from the sub-milliWatt up to the MegaWatt range, and (iii) demonstrate impact in a wide range of computational domains, spanning IoT, Big Data Analytics, Deep Learning, and HPC simulations. By combining together into a seamless design transprecision advances in devices, circuits, software tools, and algorithms, we expect to achieve major energy efficiency improvements, even when there is no freedom to relax end-to-end application quality of results. Indeed, OPRECOMP aims at demolishing the ultraconservative “precise” computing abstraction, replacing it with a more flexible and efficient one, namely transprecision computing

    Aconitate decarboxylase 1 participates in the control of pulmonary Brucella infection in mice

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    Brucellosis is one of the most widespread bacterial zoonoses worldwide. Here, our aim was to identify the effector mechanisms controlling the early stages of intranasal infection with Brucella in C57BL/6 mice. During the first 48 hours of infection, alveolar macrophages (AMs) are the main cells infected in the lungs. Using RNA sequencing, we identified the aconitate decarboxylase 1 gene ( Acod1 ;also known as Immune responsive gene 1), as one of the genes most upregulated in murine AMs in response to B .melitensis infection at 24 hours post-infection. Upregulation of Acod1 was confirmed by RT-qPCR in lungs infected with B .melitensis and B .abortus .We observed that Acod1 -/- C57BL/6 mice display a higher bacterial load in their lungs than wild-type (wt) mice following B .melitensis or B .abortus infection, demonstrating that Acod1 participates in the control of pulmonary Brucella infection. The ACOD1 enzyme is mostly produced in mitochondria of macrophages, and converts cis-aconitate, a metabolite in the Krebs cycle, into itaconate. Dimethyl itaconate (DMI), a chemically-modified membrane permeable form of itaconate, has a dose-dependent inhibitory effect on Brucella growth in vitro .Interestingly, structural analysis suggests the binding of itaconate into the binding site of B .abortus isocitrate lyase. DMI does not inhibit multiplication of the isocitrate lyase deletion mutant Δ aceA B .abortus in vitro .Finally, we observed that, unlike the wt strain, the Δ aceA B .abortus strain multiplies similarly in wt and Acod1 -/- C57BL/6 mice. These data suggest that bacterial isocitrate lyase might be a target of itaconate in AMs.info:eu-repo/semantics/publishe

    Informing children citizens efficiently to better engage them in the fight against COVID-19 pandemic

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    International audienceSince the beginning of the year, the world's attention has rightly been focused on the spread of the Coronavirus Disease 2019 (COVID-19) pandemic and the implementation of drastic mitigation strategies to limit disease transmission. However, public health information campaigns tailored to children are very rare. Now more than ever, at a time when some governments are taking populations out of lockdown and youth are returning to schools, children around the world need to fully grasp the modes of transmission of the disease, the health risks, the scientific notions of the immune system, the value of barrier measures, and the progress of scientific research. In the context of the COVID-19 pandemic, comics can be very useful for communicating quickly and effectively abstract and important information to children who might be under the influence of a large amount of sometimes contradictory information. Conveying precise, reliable, and accessible information to children is key in a world overwhelmingly impacted by the outbreak. This should be the role and the responsibility of world health official leaders and governments in compliance with the United Nations Convention on the Rights of the Child. In partnership with mainstream medias, consortia of scientists, communication experts, and education specialists, it is urgent that world leaders engage children in this worldwide public health fight

    Scalable Hierarchical Instruction Cache for Ultralow-Power Processors Clusters

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    High performance and energy efficiency are critical requirements for Internet of Things (IoT) end-nodes. Exploiting tightly coupled clusters of programmable processors (CMPs) has recently emerged as a suitable solution to address this challenge. One of the main bottlenecks limiting the performance and energy efficiency of these systems is the instruction cache architecture due to its criticality in terms of timing (i.e., maximum operating frequency), bandwidth, and power. We propose a hierarchical instruction cache tailored to ultralow-power (ULP) tightly coupled processor clusters where a relatively large cache (L1.5) is shared by L1 private (PR) caches through a two-cycle latency interconnect. To address the performance loss caused by the L1 capacity misses, we introduce a next-line prefetcher with cache probe filtering (CPF) from L1 to L1.5. We optimize the core instruction fetch (IF) stage by removing the critical core-to-L1 combinational path. We present a detailed comparison of instruction cache architectures' performance and energy efficiency for parallel ULP (PULP) clusters. Focusing on the implementation, our two-level instruction cache provides better scalability than existing shared caches, delivering up to 20% higher operating frequency. On average, the proposed two-level cache improves maximum performance by up to 17% compared to the state-of-the-art while delivering similar energy efficiency for most relevant applications.ISSN:1063-8210ISSN:1557-999

    Ultra Low Power Deep-Learning-powered Autonomous Nano Drones

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    Flying in dynamic, urban, highly-populated environments represents an open problem in robotics. State-of-the-art (SoA) autonomous Unmanned Aerial Vehicles (UAVs) employ advanced computer vision techniques based on computationally expensive algorithms, such as Simultaneous Localization and Mapping (SLAM) or Convolutional Neural Networks (CNNs) to navigate in such environments. In the Internet-of-Things (IoT) era, nano-size UAVs capable of autonomous navigation would be extremely desirable as self-aware mobile IoT nodes. However, autonomous flight is considered unaffordable in the context of nano-scale UAVs, where the ultra-constrained power envelopes of tiny rotor-crafts limit the on-board computational capabilities to low-power microcontrollers. In this work, we present the first vertically integrated system for fully autonomous deep neural network-based navigation on nano-size UAVs. Our system is based on GAP8, a novel parallel ultra-low-power computing platform, and deployed on a 27 g commercial, opensource CrazyFlie 2.0 nano-quadrotor. We discuss a methodology and software mapping tools that enable the SoA CNN presented in [1] to be fully executed on-board within a strict 12 fps realtime constraint with no compromise in terms of flight results, while all processing is done with only 94 mW on average - 1% of the power envelope of the deployed nano-aircraft
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